# Andrew S. Tanenbaum (OS) Edition 4 Exercise 3 Question 17 (Page No. 255)

35 views

Suppose that a machine has $438-bit$ virtual addresses and $32-bit$ physical addresses.

1. What is the main advantage of a multilevel page table over a single-level one?
2. With a two-level page table, $16-KB$ pages, and $4-byte$ entries, how many bits should be allocated for the top-level page table field and how many for the next level page table field? Explain.

## Related questions

1 vote
1
38 views
Suppose that a machine has $48-bit$ virtual addresses and $32-bit$ physical addresses. If pages are $4\: KB$, how many entries are in the page table if it has only a single level? Explain. Suppose this same system has a $TLB$ (Translation Lookaside Buffer ... and it sequentially reads long integer elements from an array that spans thousands of pages. How effective will the $TLB$ be for this case?
A machine has a $32-bit$ address space and an $8-KB$ page. The page table is entirely in hardware, with one $32-bit$ word per entry. When a process starts, the page table is copied to the hardware from memory, at one word every $100\: nsec.$ If each process runs for $100\: msec$ (including the time to load the page table), what fraction of the $CPU$ time is devoted to loading the page tables?
A machine has $48-bit$ virtual addresses and $32-bit$ physical addresses. Pages are $8\: KB.$ How many entries are needed for a single-level linear page table?
A computer has $32-bit$ virtual addresses and $4-KB$ pages. The program and data together fit in the lowest page $(0–4095)$ The stack fits in the highest page. How many entries are needed in the page table if traditional (one-level) paging is used? How many page table entries are needed for two-level paging, with $10$ bits in each part?