# Andrew S. Tanenbaum (OS) Edition 4 Exercise 3 Question 25 (Page No. 256)

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A computer with an $8-KB$ page, a $256-KB$ main memory, and a $64-GB$ virtual address space uses an inverted page table to implement its virtual memory. How big should the hash table be to ensure a mean hash chain length of less than $1?$ Assume that the hash table size is a power of two.

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Write a program that demonstrates the effect of $TLB$ misses on the effective memory access time by measuring the per-access time it takes to stride through a large array. Explain the main concepts behind the program, and describe what you expect the output to ... . Repeat part $(b)$ but for an older computer with a different architecture and explain any major differences in the output.
You are given the following data about a virtual memory system: The $TLB$ can hold $1024$ entries and can be accessed in $1$ clock cycle $(1\: nsec).$ A page table entry can be found in $100$ clock cycles or $100\: nsec.$ The average page replacement time is $6\: msec.$ ... by the $TLB\:\: 99\%$ of the time, and only $0.01\%$ lead to a page fault, what is the effective address-translation time?