# Andrew S. Tanenbaum (OS) Edition 4 Exercise 3 Question 41 (Page No. 259)

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A computer provides each process with $65,536$ bytes of address space divided into pages of $4096$ bytes each. A particular program has a text size of $32,768$ bytes, a data size of $16,386$ bytes, and a stack size of $15,870$ bytes. Will this program fit in the machine’s address space? Suppose that instead of $4096$ bytes, the page size were $512$ bytes, would it then fit? Each page must contain either text, data, or stack, not a mixture of two or three of them.

A computer provides each process with 65,53665,536 bytes of address means 16 pages

program has a text size of 32,76832,768 bytes means 8 pages

program has a data size of 16,38616,386 byte means 5 pages

program has a stack size of 15,870 bytes means 4 pages

total 17 pages are required but 16 are available

i) For 4096 bytes

65536 / 4096 = 16 pages(total)

text = 32768 / 4096 = 8 pages

data = 16386 / 4096 = 5 pages

stack = 15870 / 4096 = 4 pages

8+5+4 = 17, the answer is no.

ii) For 512 bytes

65536 / 512 = 128 pages(total)

text = 32768 / 512 = 64 pages

data = 16386 / 512 = 33 pages

stack = 15870 / 512 = 31 pages

64+33+31 = 128, the answer is yes.

## Related questions

1
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We consider a program which has the two segments shown below consisting of instructions in segment $0,$ and read/write data in segment $1.$ Segment $0$ has read/execute protection, and segment $1$ has just read/write protection. The memory system is a demand- paged virtual memory system ... $16$ Fetch from segment $1,$ page $4,$ offset $28$ Jump to location in segment $1,$ page $3,$ offset $32$
When segmentation and paging are both being used, as in $MULTICS,$ first the segment descriptor must be looked up, then the page descriptor. Does the $TLB$ also work this way, with two levels of lookup?
A machine-language instruction to load a $32-bit$ word into a register contains the $32-bit$ address of the word to be loaded. What is the maximum number of page faults this instruction can cause?