1,368 views
A DMA controller has five channels. The controller is capable of requesting a $32$-bit word every $40\: nsec.$ A response takes equally long. How fast does the bus have to be to avoid being a bottleneck?

$\because$ Each bus transaction consists of a request and a response.

$\therefore$ Request time $=40 \;\text{nsec}$

$\therefore$ Response time $=40\;\text{nsec}$

$\therefore 1$ Bus transaction time $=80\;\text{nsec}$

$\therefore$ Number of transactions in $1$ sec $= \frac{1 \;\text{transaction}}{80\times {10}^{-9}\;\text{sec}}\\=12.5\times{10}^6 \;\text{transactions per second}\\=12.5 \;\text{MB/sec}\;\;[\because 1 \text{MB} = 10^6 \;\text{Bytes}]$

Now, It is given that we have $5$ channels and each one is of $32-\text{bit}$ or $4-\text{Bytes}$

$\therefore$ The bus should be able to handle $12.5\times 5 = 62.5\;\text{MB/sec}$

The distribution of the transactions over the $5$ I/O channels is immaterial because the bus transaction will always take $160\;\text{nsec}$ irrespective of the successive requests made to the different or the same device.

Hence, the number of channels in the DMA controller is not required.

by

@`JEET

From where did you learn this topic?

@Sourajit25

Which topic??

You mean OS or just the DMA?

I read the book entirely that's it.

I was asking for DMA.....ok got it...will go through tannenbaum once..thanks

@JEET, Shouldn't it be 12.5*$10^{6}$*4B ?

Each bus transaction has a request and a response, each taking 50 nsec, or 100 nsec per bus transaction. This gives 10 million bus transactions/sec. If each one is good for 4 bytes, the bus has to handle 40 MB/sec. The fact that these transactions may be sprayed over five I/O devices in round-robin fashion is irrelevant. A bus transaction takes 100 nsec, regardless of whether consecutive requests are to the same device or different devices, so the number of channels the DMA controller has does not matter. The bus does not know or care.
by