A processor that has the carry, overflow and sign flag bits as part of its program status word (PSW) performs addition of the following two $2's$ complement numbers $01001101$ and $11101001$. After the execution of this addition operation, the status of the carry, overflow and sign flags, respectively will be:
Answer is (B).
1. If there is a carry in MSB and there is a carry out of MSB then there is no overflow as no overflow happening in this question.
2. If there is a carry in MSB and there is no carry out of MSB or vice-versa, there is overflow.
3. In n bits signed number (n-1) right most bits are for magnitude and nth left most bit is for sign.
4. (n+1)th left most bit is for carry, as we have the following structure to store a binary number
[C] [n, n-1, .........1]
5. Suppose sum of two numbers is cn-1, cn-2 cn-3 ........ c0, and then cn⊕cn-1 represents overflow if both the 2's complemented numbers having same sign either -ve or +ve otherwise no overflow. If both numbers are not of same size then this logic cn⊕cn-1 = 1 (overflow) fails. where cn-1 is sign bit of the sum and cn is carry out.
for example in this question cn⊕cn-1 = 1, using this logic overflow should occur but both the numbers are of different sign so overflow can't occur, so this logic cn⊕cn-1 = 1(overflow) failed.
@Manu Thakur for overflow checking operation there is no need of two numbers of same sign ,this operation can be done between two different signed numbers also, carefully check that for this question also it is satisfied.
Carry $= 1$
Overflow = $0$ (In $2's$ complement addition Overflow happens only when: Sign bit of two input numbers is $0$, and the result has sign bit $1$ OR Sign bit of two input numbers is $1$, and the result has sign bit $0$.)
Sign bit = $0$.
carry flag=1 (extra bit out of msb)
overflow flag=0 (since both in carry out carry =1 and it is addition of -ve and +ve number so overflow should be equals to 0)
(overflow bit =0 if both in carry out carry =0 or1 / addition of -ve and +ve number
& overflow bit =1 if either one of them is 1 and other is 0)
Sign bit =0 (since msb bit is 0)
therefore option B.
in 2's complement when you add two number such that A>B then you have to discard the carry bit as you get answer as true magnitude
Cout = 1 (Carry)
Cin = 1
0 (Sign Flag)
Carry Flag = 1
Overflow Flag = Cin XOR Cout = 1 XOR 1 = 0
Sign Flag = 0
Hence correct option - B