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A computer which issues instructions in order, has only $2$ registers and $3$ opcodes $\text{ADD, SUB}$ and $\text{MOV}$. Consider $2$ different implementations of the following basic block :

$$\begin{array}{l|l}\text{Case 1} & \text{Case 2} \\ \hline t1=a+b;&t2=c+d;\\t2=c+d;&t3=e-t2;\\t3=e-t2;&t1=a+b;\\t4=t1-t2;&t4=t1-t2;\end{array}$$

Assume that all operands are initially in memory. Final value of computation also has to reside in memory. Which one is better in terms of memory accesses and by how many $\text{MOV}$ instructions?

  1. $\text{Case 2,2}$
  2. $\text{Case 2,3}$
  3. $\text{Case 1,2}$
  4. $\text{Case 1,3}$
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For CASE 1 and CASE 2 Assembly language code

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Answer will be None of the options

Explanation:

https://solutionsadda.in/isro-cs-2020/ques?questionid=8922&quiz_name=ISRO%20CS%202020

Please refer the question number 51 here. I am also attaching the image file containing the explanation

 

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Case 1:

  1. t1 = a + b
    • R1 ← a , MOV
    • R1 = R1 + b, ADD
  2. t2 = c + d
    • R2 ← c, MOV
    • R2 = R2 + d, ADD
  3. t3 = e – t2
    • MEM[X] ← R1, MOV (store result t1 in memory)
    • R1 = e – R2, SUB
  4. t4 = t1 – t2
    • R1 = MEM[X] – R2, SUB
  5. Store the result
    • MEM[Y] ← R1, MOV

Case 2:

  1. t2 = c + d
    • R1 ← c, MOV
    • R1 = R1 + d, ADD
  2. t3 = e – t2
    • R2 = e – R1, SUB
  3. t1 = a + b
    • R2 ← a, MOV
    • R2 = R2 + b, ADD
  4. t4 = t1 – t2
    • R1 = R2 – R1, SUB
  5. Store result
    • MEM[Y] ← R1, MOV

 

 

Answer:

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