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A computer system with a word length of $32$ bits has a $16$ MB byte- addressable main memory and a $64$ KB, $4$-way set associative cache memory with a block size of $256$ bytes. Consider the following four physical addresses represented in hexadecimal notation.

  • $A1= \textsf{0x42C8A4}$,
  • $A2= \textsf{0x546888}$,
  • $A3= \textsf{0x6A289C}$,
  • $A4=\textsf{0x5E4880}$

Which one of the following is TRUE?

  1. $A1$ and $A4$ are mapped to different cache sets.
  2. $A2$ and $A3$ are mapped to the same cache set.
  3. $A3$ and $A4$ are mapped to the same cache set.
  4. $A1$ and $A3$ are mapped to the same cache set.
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3 Answers

Best answer
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23 votes

Block size is 256 Bytes. Number of sets in cache = $2^6$ so Set offset bits=6 and word offset bits=8.

So check for set, check for the rightmost 4 digits of each physical address.(Last two byte denote the word address)

A1=C8A4 = C8 = 11001000

A2=6888 = 68 = 01101000

A3=289C = 28 = 00101000

A4=4880 = 48 = 01001000

Now look for lowest order 6 bits in the highlighted part of Each physical address(corresponds to set number).
8 and 8 match and 6=0110 and 2=0010 two low order bits of 6 and 2 match,So A2 and A3 go to same set.

So answer-B

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32 votes
16 MB byte addressable ===> requires 24 bits to represent.

Block size= 256 B ===> 8 bits to represent.

no.of sets = $\frac{64 K}{4*256} = 64 $ ==> 6 bits to represent.

Tag = 24-8-6 = 10 bits.

 

Memory address = tag | set | block

A1 = 0x42C8A4 = (0100 0010 1100 1000 1010 0100)$_2$ ==> set bits = 00 1000

A2 = 0x546888 = (0101 0100 0110 1000 1010 0100)$_2$ ==> set bits = 10 1000

A3 = 0x6A289C = (0110 1010 0010 1000 1010 0100)$_2$ ==> set bits = 10 1000

A4 = 0x5E4880 = (0101 1110 0100 1000 1010 0100)$_2$ ==> set bits = 00 1000

 

A1 and A4 maps to the same set and A2 and A3 maps to same set.

 

Option B is correct
1 votes
1 votes
Approach should be finding number of bits in the set offset.

Set bits = log(CS/BS/k) = log(64K/256/4) = 6

Now see the addresses, the address that matters to us is C8, 68,28,48

First 6 bits from the LSB side are

001000, 101000, 101000, 001000

clearly A2 and A3 are mapped to same cache sets.
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