Consider the following statements.
- Daisy chaining is used to assign priorities in attending interrupts.
- When a device raises a vectored interrupt, the CPU does polling to identify the source of interrupt.
- In polling, the CPU periodically checks the status bits to know if any device needs its attention.
- During DMA, both the CPU and DMA controller can be bus masters at the same time.
Which of the above statements is/are TRUE?
- Ⅰ and Ⅱ only
- Ⅰ and Ⅳ only
- Ⅰ and Ⅲ only
- Ⅲ only