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The combinational circuit given below is implemented with two NAND gates. To which of the following individual gates is its equivalent?

  1. NOT
  2. OR
  3. AND
  4. XOR
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It is AND gate implementation using NAND gate.  To design $2$ input AND gate we required $2$ NAND gate.

Here the output of the first NAND gate is given as input for $2^{nd}$ NAND gate. We can write an equivalent expression for it.

$f=\overline{\left[\overline{(a.b)}.\overline{(a.b)}\right ]}$

$f=\overline{\overline{(a.b)}}+\overline{\overline{(a.b)}}$

$f=(a.b)+(a.b)$
$f=(a.b)$

$f$ is AND gate whose input is $a,b$

So Option $(C)$ is correct.
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