1 votes 1 votes In a ripple counter using edge-triggered $JK$ flip-flops, the pulse input is applied to Clock input of all flip-flops $J$ and $K$ input of one flip-flop $J$ and $K$ input of all flip flops Clock input of one flip-flop Digital Logic nielit2017oct-assistanta-cs digital-logic sequential-circuit flip-flop + – admin asked Apr 1, 2020 • edited Aug 29, 2020 by soujanyareddy13 admin 702 views answer comment Share Follow See all 0 reply Please log in or register to add a comment.
1 votes 1 votes In ripple counter using J-K flipflop with positive edge triggered, the output of one FF is fed as clock input the next FF. All FF are fed with inputs. Hence the option C is correct. DIBAKAR MAJEE answered Apr 24, 2020 DIBAKAR MAJEE comment Share Follow See all 0 reply Please log in or register to add a comment.
0 votes 0 votes option (c) is correct mohit rathore answered Sep 8, 2020 • edited Sep 8, 2020 by mohit rathore mohit rathore comment Share Follow See all 0 reply Please log in or register to add a comment.