Pipeline

Question

give proper explanation.

confusing.

Consider an instruction pipeline with five stages without any branch prediction: Fetch Instruction (FI), Decode Instruction (DI), Fetch Operand (FO), Execute Instruction (EI) and Write Operand (WO). The stage delays for FI, DI, FO, EI and WO are 5 ns, 7 ns, 10 ns, 8 ns and 6 ns, respectively. There are intermediate storage buffers after each stage and the delay of each buffer is 1 ns. A program consisting of 12 instructions I1, I2, I3, …, I12 is executed in this pipelined processor. Instruction I4 is the only branch instruction and its branch target is I9. If the branch is taken during the execution of this program, the time (in ns) needed to complete the program is :
1. 165
2. 190
3. 215
4.328

Answer 1

The Branch instruction is avail at Execution state which is the 4th stage of pipeline.
So From I1 to I7 instruction are fetched coz I7 FI overlap with the EI of I4 here branch instruction is known so it transfer the control to I9 skipping I8 therefore I9 FI overlap with I4 WO.

So total instruction Fetched = 11
using (k+n-1)tp = > (11+5-1) (10+1) = 165ns

Answer 2

All instructions before I4 will be pipelined & then I9-I12 will be pipelined so .  Tp = maxt + delay = 11

T = (n1-1+n2-1+2*k)*Tp  , n1 is first 3 instruction and n2 is 4 instructions from 9-12 , k is total stages in pipeline

T = (3+4-2+2*5)*11 = 15*11 = 165