GATE Overflow Test Series | Computer Organization and Architecture | Test 1 | Question: 13

Question

A processor that has carry, overflow and sign flag bits as part of its program status word (PSW) performs addition of the following two $2's$ complement numbers $01101100$ and $11000011.$ After the execution of this addition operation, the status of the carry, overflow and sign flags, respectively will be:

• A. $0, 1, 1$
• B. $1, 0, 1$
• C. $0, 1, 0$
• D. $1, 0, 0$

Answer 1

$$\begin{array}{|l c c c c c|}
        \hline
             C_n & C_{n-1} &  &  & &\\
             \hline
             & x_{n-1} & x_{n-2} & \ldots &  x_{0}& + \\
             & y_{n-1} & y_{n-2} & \ldots &  y_{0}&\\
             \hline
             & s_{n-1} & s_{n-2} & \ldots &  s_{0}& \\
              \hline
        \end{array}$$
For overflow: If $C_{n} \oplus C_{n-1} = 1$ or $x_{n-1}y_{n-1}\overline{s_{n-1}} + \overline{x_{n-1}} .\overline{y_{n-1}}{s_{n-1}} = 1 $
        $$\begin{array}{|l c c c c c c c c c|}
        \hline
             C_n & C_{n-1}& & & & & & & &  
              \\
             \hline
              & 0 & 1 & 1 & 0 & 1 & 1 & 0 & 0 &+\\
               & 1 & 1 & 0 & 0 & 0 & 0 & 1 & 1 &
            \\  \hline
              & 0 & 0 & 1 & 0 & 1 & 1 & 1 & 1 &
         \\    \hline
        \end{array}$$
From above we can say carry $= 1,$ overflow $= 0$ and sign $= 0.$

We can also see that since addition is for a positive and negative number, there wont be an overflow.
    
So, Option D

Comments

Overflow only occurs when both of them are either positive or both are either negetive,

OVerflow bit will always be 0 in this case

But how did carry is 1?

and how is sign 0?

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I am writing what i know, so please do get it verified.

See in 2’s complement method carry never matters until we have sufficient numbers of bits. Now, who will tell whether we have sufficient bits or not? This is what ‘overflow’ bits indicate, whether that carry was important or not. Here since no overflow occurred therefore we can say that carry doesn’t matter even though we have carry bit set. And therefore we can conclude that the answer is correct and that is why sign bit=0.

Had it overflowed then the machine would have indicated that the operation is not possible because we have insufficient number of bits.

And we already know what $C_{n} \oplus C_{n-1} = 1$ means.

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good.

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Here Cn xor Cn+1 should be 1  and hence overflow condition meets(Though it is not) as Cn =1 and Cn-1 = 0. Please correct me..