GATE Overflow Test Series | Mixed Subjects | Test 2 | Question: 24

Question

The following circuit implements a two-input OR gate using two 2-1 multiplexers.

What are the values of $X_1,X_2$ and $X_3?$

• A. $X_1=B,X_2=1,X_3=1$
• B. $X_1=A,X_2=0,X_3=A$
• C. $X_1=A,X_2=B,X_3=1$
• D. $X_1=B,X_2=0,X_3=0$

Answer 1

Output of first MUX is $A.X_1 + B.\overline{X_1}$ which is fed to second MUX. The output of second MUX is $(A.{X_1} + B.\overline{X_1}){X_3} + X_2\overline{X_3}$

This will give $A + B, $ when $X_1 = A,X_{2} = B, X_3 = 1.$

Only option C satisfies.