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The following expression was to be realized using $2$-input AND and OR gates. However, during the fabrication all $2$-input AND gates were mistakenly substituted by $2$-input NAND gates. $(a.b).c + (a'.c).d + (b.c).d + a. d$

What is the function finally realized ?

  1. $1$
  2. $a' + b' + c' + d'$
  3. $a' + b + c' + d'$
  4. $a' + b' + c + d'$
in Digital Logic by Boss (16.3k points)
edited by | 1.7k views
+9

Option (C) is correct!

+1
We can not minimize the expression and then replace with NAND gate. Always replace with appropriate gates then try to minimize. In this particular question, the answer will be the same but in general first, replace then minimize.

2 Answers

+22 votes
Best answer

The final answer will come as:

$a'+c'+d'+a'c+ab+bc$

$= a'(c+1)+c'+d'+ab+bc$

$=a'+c'+d'+ab+bc$

$=(a'+a)(a'+b)+(c'+c)(c'+b)+d'$

$=a'+b+c'+b+d'$

$=a'+b+c'+d'$

Option is C.

by Active (2.6k points)
edited by
0
Solving this by demorgans laws will make it complex any other way to solve
0
0
Answer is 1 also , please draw the k-map of option c, it is clear from that.
0

Please see the K-map. It is not 1

+12 votes
replace AND with NAND
  ((a.b)'.c)' + ((a'.c)'.d)' + ((b.c)'.d)' + (a.d)'
=ab+c'+a'c+d'+bc+d'+a'+d'
=(ab+a')+c'+a'c+d'+bc
=b+c'+(a'+a'c)+d'+bc
=(b+bc)+c'+a'+d'
=a'+b+c'+d'

So ans is C
by Active (2.4k points)
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