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0 address means, during execution of the instruction, we just need to fetch the instruction- instruction fetch but no data fetch. So, for an m-bit instruction
Number of memory reference for p = m/n

For 1-address instruction, a part of m-bit instruction will have a memory address and that memory needs to be fetched during execution. So,
Number of memory reference for q = m/n + 1

Similarly for 2-address instruction, r = m/n + 2

(May be the question meant p is the number of 0 address instruction, it is not clear)

So, assuming a1 number of p, a2 number of q, a3 number r are executed in a time frame,

Average number of memory reference per instruction will be
$$\frac{a1(m/n) + a2(m/n+1) + a3(m/n+2)  }{ (a1+a2+a3)}$$
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Let the number of bits constituting the memory address is 8 bits . Let the Instruction takes 32 bits. 

so for 0 address the number of memory accesses required for bringing the instruction is = 32/8 = 4 memory accesses so m/n

similarly for 1 address we will have the same 4 memory accesses but apart from this we will have an additional 1 memory access to bring the address from the memory. so it will be m/n+1 = 4+1=5

similarly for 2 address it will be m/n+2 = 4+1+1 = 6 

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