# GATE CSE 2021 Set 2 | Question: 53

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Consider a pipelined processor with $5$ stages, $\text{Instruction Fetch} (\textsf{IF})$, $\text{Instruction Decode} \textsf{(ID)}$, $\text{Execute } \textsf{(EX)}$, $\text{Memory Access } \textsf{(MEM)}$, and $\text{Write Back } \textsf{(WB)}$. Each stage of the pipeline, except the $\textsf{EX}$ stage, takes one cycle. Assume that the $\textsf{ID}$ stage merely decodes the instruction and the register read is performed in the $\textsf{EX}$ stage. The $\textsf{EX}$ stage takes one cycle for $\textsf{ADD}$ instruction and the register read is performed in the $\textsf{EX}$ stage, The $\textsf{EX}$ stage takes one cycle for $\textsf{ADD}$ instruction and two cycles for $\textsf{MUL}$ instruction. Ignore pipeline register latencies.

Consider the following sequence of $8$ instructions:

$$\textsf{ADD, MUL, ADD, MUL, ADD, MUL, ADD, MUL}$$

Assume that every $\textsf{MUL}$ instruction is data-dependent on the $\textsf{ADD}$ instruction just before it and every $\textsf{ADD}$ instruction (except the first $\textsf{ADD}$) is data-dependent on the $\textsf{MUL}$ instruction just before it. The $\textit{speedup}$ defined as follows.

$$\textit{Speedup} = \dfrac{\text{Execution time without operand forwarding}}{\text{Execution time with operand forearding}}$$

The $\textit{Speedup}$ achieved in executing the given instruction sequence on the pipelined processor (rounded to $2$ decimal places) is _____________

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Cycles due to Operand forwarding=16

Cycles by not using operand forwarding=37

S=37/16=2.31…

1.875

$\text{Speedup(def in question)}=\cfrac{\text{Time without Operand Forwarding}}{\text{Time with Operand Forwarding}}$

Without Operand Forwarding:

\text{MUL}&&IF&ID&&&EX&EX&MEM&WB\\\hline
\text{MUL}&&&&&&IF&&&&ID&&&EX&EX&MEM&WB\\\hline

With Operand Forwarding:
\text{MUL}&&IF&ID&EX&EX&MEM&WB\\\hline
\text{MUL}&&&&IF&&ID&EX&EX&MEM&WB\\\hline
\text{MUL}&&&&&&&IF&&ID&EX&EX&MEM&WB\\\hline
$\text{Time taken with Operand Forwarding }= 16$
$\text{Time taken without Operand Forwarding}=30$

$\text{Speedup}=\cfrac{30}{16}=1.875$

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Sir , I have written 1.875 as ANS   that's 3 decimal.

but question mentions write up to  2 decimals, will it be considered in final , GO predictor  as well as ME have given marks for it , please clear this sir

Speed Up = $\frac{23}{16} = 1.437 = 1.44$

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dependency is between Add to Mul

No dependency between Mul to add.

i think it should be 20/16 = 1.25

3
2
Using Operand forwarding: 16 cycle

Without Operand forwarding:

Case 1:

From I2,

If EX is available on WB

Than 23 cycle got.

Speed up = 23/16

Case2:

From I2,

If EX ia available after WB

Than 30 cycle got.

Speed up = 30/16

...…

Which case prefer for without operand forwarding....
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