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Consider a computer system with $\text{DMA}$ support. The $\text{DMA}$ module is transferring one $8$-bit character in one $\text{CPU}$ cycle from a device to memory through cycle stealing at regular intervals. Consider a $\text{2 MHz}$ processor. If $0.5 \%$ processor cycles are used for $\text{DMA}$, the data transfer rate of the device is __________ bits per second.

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Answer is $80,000$.

To complete one cycle at $2$ MHz it will take $\frac{1}{2\times 10^6}$ seconds. So the total number of CPU cycles in one second will be $2 \times 10^6$.

Now $0.5 \%$ of these cycles are taken by DMA to transfer the data.

So total number of cycles taken to transfer the data will be $\frac{0.5}{100} \times 2 \times 10^6 = 10,000$ and in each cycle $8$ bits are transferred.

So, data transfer rate in bits per second $=8\times 10000 = 80,000$.
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How many could do this in exam , i got confused 😅
My answer is 80402, I don’t remember how

:O
Yeah I got 80000
I also got 80000

:)
This was first question in my paper and even I got 80000 :)

Explanation

Transfer Time(let Ty) given as 1 cycle.

Let Preparation Time be Tx.

Processor operating frequency given as 2 MHz, from this we can calculate Cycle Time = 1/2MHz = 0.5 micro seconds.

%time CPU blocked = 0.5% (Given)

For cycle stealing mode, %time CPU blocked = (transfer time/preparation time)*100, putting the values in this formula,

0.5% = 1 cycle/Tx

Tx = 100 micro second.

The Tx depends upon device data transfer rate.

Now DMA is transferring 8 bit data, and to prepare 8 bits of data, time required by the device is 100 micro seconds, so we can calculate device data transfer rate as,

100micro sec ---  8 bits

1 sec – 80,000 bits.

Data transfer rate of device = 80,000 bits per second.

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2 Mhz processor means,

For each second, $2*10^6 cycles$ are there.

0.5% processor cycles are used for DMA = $\frac{0.5}{100}* 2*10^6=10^4 cycles$

For each second, it steals $10^4$ cycles for DMA operation i.e it takes control of system bus for $10^4$ times and in each control it transfers 8 bits.

In $10^4$ cycles, number of bits transferred = $8*10^4=80000$.

Hence, for each second 80000 bits are transferred.

$\therefore$ Data transfer rate of device = 80000 bits per second.

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