Answer: 80000 bits per second
Explanation
Transfer Time(let Ty) given as 1 cycle.
Let Preparation Time be Tx.
Processor operating frequency given as 2 MHz, from this we can calculate Cycle Time = 1/2MHz = 0.5 micro seconds.
%time CPU blocked = 0.5% (Given)
For cycle stealing mode, %time CPU blocked = (transfer time/preparation time)*100, putting the values in this formula,
0.5% = 1 cycle/Tx
Tx = 100 micro second.
The Tx depends upon device data transfer rate.
Now DMA is transferring 8 bit data, and to prepare 8 bits of data, time required by the device is 100 micro seconds, so we can calculate device data transfer rate as,
100micro sec --- 8 bits
1 sec – 80,000 bits.
Data transfer rate of device = 80,000 bits per second.