# GATE CSE 2021 Set 2 | Question: 5

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Which one of the following circuits implements the Boolean function given below?

$f(x,y,z) = m_0+m_1+m_3+m_4+m_5+m_6$, where $m_i$ is the $i^{\text{th}}$ minterm.

edited

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Option $(A)$ is the correct answer.

1 vote

Option A is correct.

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A

While solving I would suggest to go along with your intuition mechanisms but for the sake of completeness I’m choosing the time consuming one to better understand how to build and solve one.

Most of the times while using MUX to implement boolean functions people tend to use the less significant variables as their select lines. We use Variable Entrant Map for such problems.

The min-terns are designated to the VEM by choosing the variables for LSBs to represent the select lines here, two bits are used which is used to designate min-term under which box(in VEM) it appears, all of them are pooled to together and the optimal gate logic is found out functions under their boxes.

Here,
$m_0\ \&\ m_4$ under $\overline{y}\overline{z}$
$m_1\ \&\ m_5$ under $\overline{y}z$
$m_6$ under $y\overline{z}$ and.
$m_3$ under $yz$
$\hspace{170pt} \begin{array}{cc} \begin{array}{c}\\\bar{y}\\ y\end{array} \begin{array}{c}\bar{z}\hspace{11pt}z\\ \begin{array}{|c|c|}\hline 1 &1\\\hline x&\bar{x}\\\hline\end{array} \end{array}\end{array}$

Voilà

Now for using the above table, design the MUX which should look like this.

Which resembles Option A(can’t go wrong copied it :P)

edited

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