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A hard disk with transfer rate of 20 kbps is constantly transferring data to memory using DMA cycle stealing mode. The size of data transfer is 32 bytes. The processor runs at 800 kHz clock frequency. The DMA controller requires 12 cycles for initialization of operation and transfer takes 4 cycles to transfer 2 byte of data from device to the memory. Then the transfer time for transfer time ______(μs)

My question is : as it is cycle stealing mode and 2 Byte of data transferred at every 4 cycles. So , after every 2 Byte data sent , DMA will give the control back to processor , is it correct ? So , will it not take 32/2 = 16 times to transfer the 32 B

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    Takin $20kbps$ as $20KBps$

    as it is cycle stealing mode so disk will interrupt the processor for every single Byte.

    Data preparation time: $\frac{1}{20}=0.05ms$

    Data transfer time for each Byte:$\frac{2+12}{800}=0.03ms$

    using concept of pipelining, when data is transfering during $0.03ms$ then simultaneously data is preparing so it will take extra $0.02ms$ thereafter.

    so total time to transfer $32B$ is : $(0.05+0.03)+(0.02+0.03)*31=1.63ms$
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    In cycle stealing mode ,  processor and DMA uses alternate cycles for data transfer.

    total cycles needed= 16 or 15 (if dma starts first then 15 else 16)

    transfer time =(initialization time+16)* 1/clock frequency

    transfer time=28/800khz

    35 $\mu$sec
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    4 cycle for 2 bytes means 2 cycle transferring 1 byte and 12 cycle for preparation so,

    total cycle needed to transfer 1 byte= 14 cycle 

    for 32 byte => 32x14 cycle =448

    time= 448/(800x10^3) = 0.56 ms

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