1 vote

All the logic gates in the circuit shown below have finite propagation delay. The circuit can be used as a clock generator, if

a) X = 0

b) X = 1

c) X = 0 or 1

d) X = Y

11 votes

Best answer

it looks like asynchronous sequential circuit.

here, Next state, $Y = x \oplus y$ , where $x$ is input , $y$ is present state

Present state $y$ | input
$x$ |
Next state $Y$ |

0 | 0 | 0 |

0 | 1 | 1 |

1 | 0 | 1 |

1 | 1 | 0 |

At $x=0$, circuit reach to stable state, if y is $0$, it will remain $0$, or if it is $1$ it will remain $1$.

At $x=1$ , states goes $0$ to $1$ , $1$ to $0$, so on , will not reach to stable state.

At $x=y$, next state will remain always at $0$, as seen in table.

so , At $x=1$ , the above circuit will generate the sequence of 0,1,0,1.. , can be used as clock generator.

2 votes

We know for $\mathrm{XOR}$ gate that

$\mathrm{A \bigoplus B=A\bar{B}+\bar{A}B}$

So $1 \bigoplus \mathrm{A} =1\cdot\bar{\mathrm{A}}+\bar{1}\cdot\mathrm{A}=\bar{\mathrm{A}}+0\cdot\mathrm{A}=\bar{\mathrm{A}}$

It means **any one input** of $\mathrm{XOR}$ gate is $1$, the output will be the **negation of the other input** i.e. this $\mathrm{XOR}$ gate **logically** converts to $\mathrm{NOT}$ gate.

Here in the diagram the output $\mathrm{Y}$ of the $\mathrm{XOR}$ gate is fed into its own $\mathrm{XOR}$ gate. So if this gate can logically be converted into $\mathrm{NOT}$ gate, it will produce $0,1,0,1,...$ assuming initial state of $\mathrm{Y}$ as $0$.

That's why $\mathrm{X}$ should be $1$.

So the correct answer is **b)**.