Gate Applied Course Test Series

Question

 

• A. A 5-stage(IF,ID, EX, MEM and WB) MIPS pipeline has a register file without forwarding mechanism.How Many NOPs (or bubbles) will you need to add to make this code work correctly

            Lw $1, 40($6)

            Add $6,$2, $2

           SW $6, 50($1)  //$6 → M[$1+50]

A)1                      B) 2              C)0                  D) 3

Comments

Given answer is 1, but i got 2. which is right?

Answer 1

->in the second instruction: add, the final values is written to register in last stage i.e. WB
->in last instruction the: sw has to fetch updated values for consistency so it’s decode stage has to wait until then. thus 3 bubbles/ nop required for successful functioning.

There can be misprints in the book if it shows that ans is 1.

Answer 2

Generally ID stage is treated as (ID+OF)..

So operand fetch(ID) can be done in 5th clock cycle using Split phase method between WB and ID ..

so the answer is is 1... ID should be in 5 th clock cycle not in 3 rd clcok cycle...

@Arjun rt??