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closed as a duplicate of: Gate q-43_44

The cache memory hit ratios for read and write operations are 80% and 90% respectively.

If there is a miss then 2 word block is to be through from main memory to cache.

Consider 30% updations and the cache access time is 20ns/word and memory access time 100 ns/word. Then calculate the efficiency of write back and write through scheme

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