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Given a byte addressable system which implements demand paging, a TLB has 64 entries and the frame size is 4KB. The LAS is 4MB. TLB has a hit ratio of 90% and has an access time of 2 ns. If the main memory access time is 100 ns and page fault is 5%. The page fault service time is given to be 100 ms. The TLB reach for this system given above is _____ B

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Here, you have to only consider the number of entries in the TLB and page size. All the other data like hit ratio and all is not needed.

TLB reach is the number of distict values that can be accessed by the TLB.

So, 

TLB reach= Number of entries * Page size.

Here, page size is not given, but page size=frame size=4KB

So, page size=4KB

TLB reach= 64*4KB

                    =262144 entries

So, 262144 different entries can be accessed by the TLB.

 

 

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