made easy test series - cache addressing

Question

Consider a 4-way set associative cache of 64 KB used in a 32-bit CPU, organized into 32-word blocks. System supports 64 GB RAM. Cache is designed with a write back protocol to handle the updation issues. In each line a valid bit is present to specify the status of a block. What is the size (in bits) of a tag directly in the cache controller?

Comments

here it is given that the cpu is 32 bit .

what does it implies ?

It implies the cpu is capable of transferring 32 bit at a time . If in the question it is given that cpu generates 32 bit address and then it also gives the size of RAM 64 GB then it will be some what made ambiguity as we are not sure that the cache is virtually index or physically indexed. There is generally a confusion on this topic how the cache is addressed virtually or physically but in the question it should be made clear how the cache is addressed.

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I think there’s an unsaid rule in the question itself, and it’s debatable, that’s for sure. We have got a $32$bit CPU, which means we can generate $2^{32}$ unique addresses. The Memory here may/may not be byte-addressable, and there’s no explicit mention of word size.

So, to access all of $64GB$ physical Memory with just $32$bits, we need to have a word size longer than a byte.

$\text{Word Size}=\cfrac{\text{Physical Mem Size}}{\text{Unique Addresses}}=\cfrac{2^{36}bytes}{2^{32}}=16B$

What does it mean? We need a word size of at least $16B$  to access all physical Memory. Suppose we had a byte-addressable memory; we could only access about $4GB$ worth of Mem; the rest would’ve been a waste. 

And, having a $32$bit computer doesn’t necessarily imply the word size of $32$bits, we access chunks of memory bigger than a word from the main memory and is fed into the cache from where we retrieve information. There are some real examples here.

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Also, we can't assume the system supports more than $64$GB of RAM, so my best bet would be to derive the minimum word size required and proceed with the latter part of the question.

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Oh yes due to WB , thanks for clarifying that