365 views
1 votes
1 votes
Consider a memory system that uses a 32-bit address to address at the byte level, plus a cache that uses a 64-byte line size. Assume a four-way set-associative cache with a tag field in the address of 9 bits. The total number of cache lines/ blocks in the cache are_____

Please log in or register to answer this question.

Related questions

1 votes
1 votes
1 answer
1
LRU asked Dec 4, 2021
380 views
The cache takes 2 cycles to access and has a 5% miss rate, main memory takes 100 cycles to access and has an 8% miss rate, and the disk takes 10,000 cycles to access. The...
1 votes
1 votes
1 answer
2
2 votes
2 votes
2 answers
4
LRU asked Nov 5, 2021
529 views
Consider the following memories with their miss rates and hit times Then the average memory access time is ______ (in ns)