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Consider a pipeline  consist of 5 stages named as IF, ID, OF, EX and WB with the respective stage delays of 2 ns, 6 ns, 5 ns, 8 ns and 1 ns. The alternative pipeline ‘y’ contain the same number of stages but EX stage is divided into 2 substages, (EX1 and EX2) with equal delay i.e. (8 ns/2) and ID stage is divided into 3 substages (ID1, ID2 and ID3) with equal delays of (6 ns/3). In the pipeline x and y memory reference instructions are not overlapped so the penalty of memory reference instructions in the pipeline  is 4 cycles and in the pipeline ‘y’ is 8 cycles. If the program contain 20% of the instructions which are memory based instructions, what is the ratio of speed-up of x to speed-up of y?

0.90 ?

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$S_{x}\ =\ \frac{t_{n}}{(1 \ + \ number \ of \ stalls \ per \ instruction)cycle time}$

$S_{x}\ =\ \frac{22}{1 \ + \ (0.2 \times 4)8 \ ns}$

$\Rightarrow \frac{22}{14.4} \ \Rightarrow 1.528$

$S_{y}\ =\ \frac{t_{n}}{(1 \ + \ number \ of \ stalls \ per \ instruction)cycle time}$

$S_{y}\ =\ \frac{22}{(1 \ + \ 1.6)5 \ ns}$

$\Rightarrow \frac{22}{13}\ \Rightarrow \ 1.692$

$\frac{S_{x}}{S_{y}} \ = \ \frac{1.528}{1.692} \ = \ 0.90$

For pipeline X

Speedup gain = Time taken for 1 instruction in  Non pipeline configuration / Time taken for 1 instruction in  Pipeline configuration

= (2+ 6+ 5 + 8 + 1) ns / (( 1+ 0.2 x 4) x8 )ns

=1.527

For pipeline Y

Speedup gain = Time taken for 1 instruction in Non pipeline configuration / Time taken for 1 instruction in Pipeline configuration

= (2+ 6+ 5 + 8 + 1) ns / (( 1+ 0.2 x 8) x5)ns

=1.69

Ratio Speedup of X to speedup of Y is = 1.527 / 1.69

=0.90

by

= (2+ 6+ 5 + 8 + 1) ns / (( 1+ 0.2 x 8) x4)ns

I think this needs a bit of modification as I am getting 0.90 as the answer.

Thanks @Vishal_kumar98 you are right , there is 5 instead of 4. I edited my answer now.