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The format of a double operand instruction of a CPU consist of 4 bit op-code and 4 bits for source and destination. 12 double operand instructions and 24 single operand instructions must be implemented. Op-code field must identify the three groups of n-operand instructions. Calculate the total number of zero operand instructions that can be implemented?

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Each instruction has 12 bits- 4 for opcode, next 4 first address and final 4 second address.

We have 12 double operand instructions which leaves 4 combinations of first 4 bits free. We have 4 bits left. Let them be 

  • 1100
  • 1101
  • 1110
  • 1111

We need to identify 1-operand and 0-operand instructions with these 4 bits as told in the question. i.e., we cannot use any of these 4 for both one operand as well as 0 operand (which we do when using extended opcode technique). 

Now, we need 24 single operand instructions. If we take 1100 for single operand instruction using the next 4 bits (we can use the first address field for instruction as we need only 1 address here) we can get 16 instructions. But we need 24 instructions which require us to use "1101" also. This gives us 16+16 = 32 possible instructions of which we use only 24. 

Now, we have 1110 and 1111 for 0 operand instructions. Each of these allows $2^8 = 256$ 0 operand instructions and thus we get $512$ such instructions possible. 

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There are total 2^4 = 16  starting nibble value for all instructions, Out of these there are 12 reserved for 2 operand instructions , for 1 operand instruction we can use 8 bit opcode and 4 bit operand so 24 instructions can be made by 2 values in first nibble and 2^4 bits in second which 2^5 > 24 .  So you can only assign 2 values in first nibble for zero operand instructions and 2^8 values for remaining bits so that total number zero operand instuctions are 2^9 = 512

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