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GO Classes Test Series 2023 | Digital Logic | Test 2 | Question: 9

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In which of the following cases has overflow Not occurred (addition of two-complement numbers)?

  1. The MSB of first number is $0$ and of second number is $0$ and MSB of the result is $1.$
  2. The MSB of first number is $1$ and of second number is $0$ and MSB of the result is $1.$
  3. The MSB of first number is $1$ and of second number is $1$ and MSB of the result is $0.$
  4. Carry into the MSB is $1$ and carry out of the MSB bit is $0.$
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2 Answers

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A; C; D are standard conditions for overflow in $2$-complement addition.
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Let us consider 2 n bit binary numbers, A and B in their 2’s complement form. Where A = An-1….A1A0 and B = Bn-1….B1B0.

Let their sum, S = SnSn-1….S1S0

Then overflow occurs whenever:

  1. An-1.Bn-1.(Sn-1)’ + (An-1)’. (Bn-1)’. Sn-1 = 1
  2. Cn XOR Cn-1 = 1 , where Cn and Cn-1 are the carry bits for nth and (n-1)th bit  respectively.

Hence, option b is the only answer.

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GO Classes Test Series 2023 | Digital Logic | Test 2 | Question: 8
Which of the following is true about a storage cell in an SRAM It is volatile It must be refreshed regularly. It is a capacitor It is faster than an DRAM
Which of the following is true about a storage cell in an SRAMIt is volatileIt must be refreshed regularly.It is a capacitorIt is faster than an DRAM
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