The Gateway to Computer Science Excellence
+21 votes
5.7k views

Which of the following input sequences will always generate a $1$ at the output $z$ at the end of the third cycle?

GATE2005-IT_43

  1. $\begin{array}{|l|l|}\hline \textbf{A} & \textbf{B} & \textbf{C} \\\hline  \text{0} & \text{0} & \text{0} \\\hline   \text{1} & \text{0} & \text{1} \\\hline  \text{1} & \text{1} & \text{1} \\\hline \end{array}$
  2. $\begin{array}{|l|l|}\hline \textbf{A} & \textbf{B} & \textbf{C} \\\hline  \text{1} & \text{0} & \text{1} \\\hline   \text{1} & \text{1} & \text{0} \\\hline  \text{1} & \text{1} & \text{1} \\\hline \end{array}$
  3. $\begin{array}{|l|l|}\hline \textbf{A} & \textbf{B} & \textbf{C} \\\hline  \text{0} & \text{1} & \text{1} \\\hline   \text{1} & \text{0} & \text{1} \\\hline  \text{1} & \text{1} & \text{1} \\\hline \end{array}$
  4. $\begin{array}{|l|l|}\hline \textbf{A} & \textbf{B} & \textbf{C} \\\hline  \text{0} & \text{0} & \text{1} \\\hline   \text{1} & \text{1} & \text{0} \\\hline  \text{1} & \text{1} & \text{1} \\\hline \end{array}$
in Digital Logic by Boss (16.3k points)
edited by | 5.7k views
0
Kindly make the question more clear ! Third cycle here means that after giving the last input. for example in the first option after we give A,B and C : 1 1 1 , the the output should be 1 at z. Is this what is meant by the third cycle ??
+4
Its a GATE question :) If you see the circuit, z depends on the previous output. And thats why 3 sets of inputs are given.
0
sir please solve it
+1

After the second cycle the value of Q should be 0, which is not happening in any of the options, hence something is wrong.
Anyway, i couldn't understand one thing, will the same clock pulse be applied together to both the flipflops?

0
yes, manu I think both of them should be applied together this type of representation occur many times in questions but I think for a circuit there exist only a single clock pulse, this representation might be used to make diagram look cleaner.
0
To give z as 1 in 3 rd clock-cycle, Q1 is 2nd clock-cycle should be 0 ... and that will happen only if input of A = 0,B=0 is given in 2 nd clock-cycle and none of the options have A = 0 , B = 0 in 2 nd clock-cycle ...So none of them matches ...

5 Answers

+32 votes
$${\begin{array}{|c|c|c|c|c|c|c|l|}\hline\\
\textbf{}&    \textbf{A}&  \textbf{B}&\bf{C}& \bf{Q_1}& \bf{Q_2} & \textbf{Z} & \textbf{Comment}\\\hline
\text{After } 1^{st} \text{Cycle} &\text{X} &\text{X} &\text{X} &\text{X} &\text{X} &\text{X} \\\hline \text{After } 2^{nd} \text{Cycle}&0&0&\text{X}&0&\text{X} & \text{X}& \text{$Q_1$ is 0 making A and B 0}\\ \hline    \text{After } 3^{rd} \text{Cycle}&\text{X} &\text{X} &1&1&1&1& \text{$Z$ is $1$ making $Q1$ and $Q2$ $1$,}\\&&&&&&&\text{Either $A$ or $B$ is $1$.} \\&&&&&&&\text{$Q1'$ of previous cycle is $1$.} \\ \hline
\end{array}}$$
The filling is done in reverse order. Here, none of the options match. So, something wrong somewhere.
by Veteran (424k points)
edited by
0

@Arjun: I am getting option (D) as answer.

You must take care that the value of ~Q that is ANDed with C  is actually the initial value of of ~Q before giving any input or triggering the CLOCK pulse.

If we assume that Q is zero initially, we get ~Q=1 and this is ANDed with first C bit to produce the Z for that particular cycle.

Please verify this.

+14
A and B should be 0 for the second cycle, but none of the options have this, rt?
0
I got (D) as zero in 1st and 2nd cycle and 1 in the third .

You verify this.
0

@Sandeep_Uniyal, how you started initial values of both Q? mean,  Qo = ? and Q1 = ??  

+3
I Derived up to this equation

Z = (A + B).( C . A' . B')
+7
characteristic equation of D FF is Qn+1=D
1st D FF output is (A+B)
2nd D FF output is (A+B)'C
and final result Z=(A+B).((A+B)'C)=(A+B)(A'B'C)=0
all options are wrong
+1
Sir i think they asked for which set the output will be one . for c it will be always one . how you answered this. I can't understand it.
0
@arjun sir any source to solve such questions?
0
if i assume Q=0 intially , so Q'=1  which is input of second one D flip flop then i got B option as answer
+6

@Prasanna

If we write the equation then we get Z=( A+B ). ( C. (A+B)' )

As . (And is associative)

so we can write it as Z= ((A+B). (A+B)'). C

                               Z=0.C

                               Z=0 

Hence it is giving us 0 always it means all options must be wrong!!!!

0
@Arjun sir, what to do when these type of questions come in gate exam, such that no option matches? Were marks given to all in this question in 2005?
+1
Your approach is wrong .You cant make A=B=Q1=0 in same cycle. Input at D1 will appear as output in Q1 in the next cycle . Consider same for second flip flop , you will get A as the answer.
0
Please read the explanation and the discussion.
0

Sir,  even I am getting 0 for z in all the options. Why are you saying to fill the table in reverse order.
I solved it using the given order only by forming equation of z ( z = (a+b).c.(ap'.bp'))
Where p denotes values of a and b from previous cycle.

Am I doing wrong somewhere?

0
@Sid1221.. This assumption is wrong because if no input is given to the first input terminal of the first AND gate , that input will be considered as zero, so it is of no use to assume Q1=0 here. Correct me if I am wrong.
0
@Arjun sir, in first clock cyle , since there is no input in first input terminal of AND gate, so what should we assume, ....zero  or it has to be assumed according to ~Q initially i.e. if I assume Q to be 0 initially, then ~Q  will be 1. So which value should be taken as input to first terminal of first AND gate??

please tell.
0
@ayush will you please elaborate?
0

Are this characteristic equations right ?

+4 votes
Let's take cycles as 1,2,3.

There are two flip-flops, let's call them D1 and D2.
And Q1, Q2 to be the output for flip-flop D1, D2 respectively.
here Q11 means output of D1 flip-flop for 1st cycle, similarly Q12 
is the output of D1 flip-flop for 2nd Cycle.
A1, A2, A3 means input for A at cycles 1, 2, 3 respectively. Similarly for B and C.

Let's check for the option D where:

A1=0 A2=1 A3=1
B1=0 B2=1 B3=1
C1=1 C2=0 C3=1

Q11=0 
Q12 = A1.B1 = 0.0 = 0 
Q13 = A2.B2 = 1.1 = 1 
~Q11=1
~Q12 = ~(A1.B1) = 1 
~Q13 = ~(A2.B2) = 0 
Q21 = 0 
Q22 = C1.(~Q11) = 1.1 = 1 
Q23 = C2.(~Q12) = 0.1 = 0

Z1 = 0 
Z2 = Q12.Q21 = 0.0 = 0 
Z3 = Q13.Q22 = 1.1 = 1 

Hence, sequence given in option D is generating a 1 at the output z at the 
end of the third cycle (Z3).
by Active (5.2k points)
0
yes A and B should be zero for third cycle to give zero therefore none of the option is right
0
Isnt Q22 should be c2(~Q11) and Q23 =c3(~Q12) ?
0

there is OR gate b/w A and B and not AND.

 

0
How did Q12 become A1.B1?
+2 votes

I am getting  Option(a) as the correct answer. If wrong please rectify it.

I have taken the initial state as 0. 

by Junior (829 points)
+1
check your x'
0
after applying clock 1, x and x' can't be same bcz after applying clock after sometime they must be different according to the circuit. so in this example all option should be wrong.
+2 votes
Answer is C

Explanation:

Here given in question first O/P Z is always 1 at the end of third cycle.

(I have consider first f/f Q as Q0 and second below f/f as Q1)

So Z=1

now for Z=1

Iff Q0 and Q1 are 1.

for Q0=1:

Either A or B should 1 or Both

i.e.

A B

0 1

1 0

1 1

Now for Q1=1:

Q0'.C=1   only when Q0=0 and C=1

Now combine the Input sequences(for both Q0=1 and Q1=1):

A B C

0 1 1

1 0 1

1 1 1

 

So, C is the Answer here.
by Active (1.4k points)
0
Kindly check your logical implication again..
0 votes
A B C $D_{top}$ $D_{bottom}$ $Q_{top}$ $Q_{bottom}$ Z Remark/Comment
X X X X X 1 1 1 Final Value
1 0 1 1 1 0 X X Required Value before $3^{rd}$ clock
0 0 X 0 X X X X Required Value before $2^{nd}$ clock
X X X X X X X X Required Value before $1^{st}$ clock

In the $2^{nd}$ row (from top). Following values are also possible.

0 1 1 1 1 0 X X Required Value before $3^{rd}$ clock
1 1 1 1 1 0 X X Required Value before $3^{rd}$ clock

So non of the options are matching. I hope this helps.

ping @Krish__, @rahul sharma 5,  @Red_devil, @Shivam Chauhan, @Tuhin Dutta, @Anu007,  @Ashwin Kulkarni @reena_kandari  and @srestha ji

by Boss (13.3k points)
0
Whats the final conclusion on this, as 3rd cycle for all 4 options is 111 are none of the answers correct, if so was grace marks given in Gate 2005 for this questions

Related questions

Quick search syntax
tags tag:apple
author user:martin
title title:apple
content content:apple
exclude -tag:apple
force match +apple
views views:100
score score:10
answers answers:2
is accepted isaccepted:true
is closed isclosed:true
50,647 questions
56,492 answers
195,439 comments
100,707 users