Considering a system with Single-Level page table, with a TLB to reduce the access time of pages. A cache is also provided with the main memory. All the pages ultimately reside in MM. (assuming there’s no page fault).
- TLB Hit Ratio = x
- TLB Access Time = a unit
- Cache Hit Ratio = y
- Cache Access Time = b unit
- Main Memory Access Time = c unit
Is it possible that the page table can get stored in the cache? If so, is this calculation of Effective Page Access Time with TLB correct?
Effective Memory Access Time with Cache (p) = (y)(b) + (1-y)(b+c)
Effective Page Access Time With TLB = (x)(a+p)+(1-x)(a+p+p) [One p to get access of the page table in Cache or MM and another ‘p’ to get access of the frame from memory]
I have seen somewhere that they mentioned Page Table will only get stored in MM not in Cache. So, for TLB miss it will be (a+c+p). But if this is true, why can’t we store Page Table in a Cache?