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Q).We have two dsigns $D1$ and $D2$ for a synchronous pipeline processor, $D1$ has $5$ pipeline stages with execution times of $3 \text{nsec}$  $2\text{nsec}$ ,$4 \text{nsec}$ ,$2 \text{nsec}$ and $3 \text{nsec}$ , while the design $D2$ has a $8$ pipeline stages each with $2 \text{nsec}$ execution time. How much time can be saved using design $D2$ over design $D1$ for executing $100$ instructions ? 196 nsec  (integer value only) .The correct answer is 202

Please check how the answer would be 202. 

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D1- tpd1= 4ns, no. of stages is 5, k=5

D2- tpd2= 2ns, no. of stages is 8, k=8

No. of instructions is ,n=100

Td1= (k+n-1)*tpd1= (5+100-1)*5 =104*4=416

Td2 = (k+n-1)*tpd2= (8+100-1)*2= 107*2=214

Td1-Td2= 416-214=202ns
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