0 votes 0 votes CO and Architecture made-easy-test-series co-and-architecture instruction-execution + – vikas khuswaha asked Feb 2, 2016 edited Mar 5, 2019 by akash.dinkar12 vikas khuswaha 521 views answer comment Share Follow See all 4 Comments See all 4 4 Comments reply Tendua commented Feb 3, 2016 reply Follow Share 14 ns i think . and i don't know what the question want to specify . the meanings are not the usual meaning . so whatever is iven go according to meaning . they may have defined ADD as memory refrence instruction . so 8+4+4+4+8. and halt just et pc to itself no calculations involved , = 28 cycles on total * cycle time = 14 ns . don't focus on this now . want to do like this . gatebook is best 0 votes 0 votes Ankesh Gautam commented Feb 3, 2016 reply Follow Share what i feel is there are 7 memory ref and 2 alu. 0 votes 0 votes Tendua commented Feb 3, 2016 reply Follow Share they are not doing it as they usually mean . meaning is given with everything / 0 votes 0 votes ronak.ladhar commented Oct 20, 2020 reply Follow Share Cycles per Instructions: I1: 8 I2: 4 I3: 6 I4: 6 I5: 8 I6: 0 Total Cycles: 32 cycles Total Time = 32/2 ns = 16ns 0 votes 0 votes Please log in or register to add a comment.