965 views
0 votes
0 votes

Consider 4-stage (IF, ID, EX, WB) pipeline used to execute the following code. All instructions are spending are spending one cycle on all the stages but ALU instructions are spending 3 cycles on  3rd  stage.

I1: LOAD R0, [2000]

I2: ADD R2, R0, R1

I3: SUB R3, R2, R1

Number of cycles are saved using operand forwarding over without operand forwarding is?

Can someone please explain by drawing the diagram?

 

1 Answer

3 votes
3 votes

Without Operand Forwarding:

$\begin{array} {|r|r|}\hline 1 & 2 & 3 & 4 & 5&6&7&8&9&10&11&12&13&14 \\\hline IF & ID & EX & WB \\ \hline & IF& -- & -- & ID & EX & EX & EX & WB &  &  & & &  \\ \hline  & & -- & --& IF& --& -- &-- & --& ID & EX & EX& EX& WB \\ \hline \end{array}$

With Operand forwarding:

Assuming Operand forwarding is from EX to EX stage

$\begin{array} {|r|r|}\hline 1 & 2 & 3 & 4 & 5&6&7&8&9&10\\\hline IF & ID & EX & WB \\ \hline & IF& ID &EX & EX & EX & WB&    \\ \hline  & & IF & ID& --& --& EX &EX& EX& WB  \\ \hline \end{array}$

So cycles saved = 14-10 = 4

edited by

Related questions

0 votes
0 votes
1 answer
1
Deepak9000 asked Nov 5, 2023
255 views
I have a Self doubt question on Operand Forwarding . The data forwarded should be done in EX-EX stage or Mem-EX ? Which one to follow and when ?Using EX-EX we require les...
17 votes
17 votes
1 answer
3
dd asked Jan 8, 2017
20,849 views
A $5$ stage pipelined processor has the following stages:$IF$ : instruction fetch$ID$ : instruction decode$EX$ : execute$MA$ : memory access$WB$ : write back$$\large\colo...
0 votes
0 votes
2 answers
4