This explanation is awesome and I'm clear how it worked for this question.
However I have a general doubt regarding virtually addressed caches. When CPU generates the virtual address 0XFF000 000, cache has to check whether the MM block corresponding to this VA is present in cache or not. So to performs this check, is it the same way as it's done for physically addressed cache, by breaking the address into tag bit, block offset and word offset then comparing tag bits for corresponding block? Is this process same for all Pipt cache, Vivt cache, Vipt cache?
Help would be really appreciated. Thanks!
(P-physically, v- virtually, i- indexed, t- tagged)