In an instruction execution pipeline, the earliest that the data TLB (Translation Lookaside Buffer) can be accessed is:
before effective address calculation has started
during effective address calculation
after effective address calculation has completed
after data cache lookup has completed
C is the answer here.
Effective address is the address after applying the addressing mode like indexed, immediate etc. But this resulting address is still the virtual address, the physical address is invisible to the CPU and will be given only by the MMU when given the corresponding virtual address. Virtual address is given for TLB look up. TLB -Translation Lookaside Buffer, here Lookaside means during Address translation (from Virtual to Physical). But virtual address must be there before we look into TLB.
in case of indirect addressing mode.the flow will be
[data from address field ] -> memory access-> TLB ->actual frame address ->data in that memory location -> back to processor->now this data is my effective address.
sir,so i think answer should be B.
Explanation: When we calculate effective address, first of all we access TLB to access the Frame number.
Logical address generated by CPU breaks in two parts : page number and page offset, for faster accessing of data we place some page table entries in a small hardware TLB whose access time is same as cache memory. So initially when page no. is mapped to find the corresponding frame no., first it is look up in TLB and then in page-table (in case if TLB miss).
During effective address calculation TLB is accessed.
So (B) is correct option.
B. during effective address calculation
an effective address is Virtual address and after Virtual address calculation we look into TLB. So option C is correct.