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+26 votes
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In an instruction execution pipeline, the earliest that the data TLB (Translation Lookaside Buffer) can be accessed is:

  1. before effective address calculation has started

  2. during effective address calculation

  3. after effective address calculation has completed

  4. after data cache lookup has completed

asked in CO & Architecture by Veteran (59.6k points)
edited by | 3.1k views
+4
In a system without virtual memory , the EA will be either a main memory address or a register.

In a virtual memory system , the EA is a virtual address or a register.
0

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5 Answers

+30 votes
Best answer

C is the answer here.

Effective address is the address after applying the addressing mode like indexed, immediate etc. But this resulting address is still the virtual address, the physical address is invisible to the CPU and will be given only by the MMU when given the corresponding virtual address. Virtual address is given for TLB look up. TLB -Translation Lookaside Buffer, here Lookaside means during Address translation (from Virtual to Physical). But virtual address must be there before we look into TLB.

https://gateoverflow.in/?qa=blob&qa_blobid=15279338060050073946
 

answered by Veteran (363k points)
selected by
0
Here the answer given is B. Is C right or B?
0
Where is B given? C is the answer.
0
+7
That is wrong explanation. they are explaining for physical address resolution and not for effective address calculation.
0
Thank you sir.
+2

in case of indirect addressing mode.the flow will  be 

 [data from address field ] -> memory access-> TLB ->actual frame address ->data in that memory location -> back to processor->now this data is my effective address.

sir,so i think answer should be B.

+1
I suppose the question is clear that it is referring to the TLB lookup for a given memory access.
0
Sir the pdf you have mentioned says "instruction TLB" to be accessed before effective address calculation not the "data TLB". And the data cache access is specified after the calculation of the effective address.

Sir what is the concept here? Where to get theory about such topics?

Plzz help.
0
@Arjun sir. How to differentiate if Effective address is for Data address r the Effective address is virtual address.?
0
If indirect addressing mode is used then answer should be b) . Also as earliest is asked, I think we can assume indirect addressing. @Arjun Sir.
+18 votes
C as only after the calculation of Virtual address you can look up in the TLB
answered by Loyal (6.9k points)
+4 votes

in case of indirect addressing mode.the flow will  be 

 [data from address field ] -> memory access-> TLB ->actual frame address ->data in that memory location -> back to processor->now this data is my effective address.

sir,so i think answer should be B.

answered by Active (2.3k points)
0
Seems reasonable....
0
Effective = logical
–1 vote
B. During effective address calculation
answered by (279 points)
–3 votes

B. during effective address calculation

answered by Boss (13.7k points)
0
Yes this seems correct. My reason would be that during eff address calculation logical address needs to be converted to physical addresses. For this conversion tlb would first come into picture. Hence it would be during the effective address calculation only....is this correct???
+3
No. Effective address still means virtual address.
0
@Arjun Sir which is correct Bor C?
0

Sandeep

an effective address is Virtual address and after Virtual address calculation we look into TLB. So option C is correct.

+1
@Bikram sir sir

it means after calculation of effective/logical address we look into TLB to check whether  data is present or not

this is the reason for C option
0
@set2018

Yes correct
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