tlb

Question

The virtual address generated by a CPU is 32 bits. The Translation Look-aside Buffer (TLB) can hold total 64 page table entries and a 4-way set associative (i.e. with 4- cache lines in the set). The page size is 4 KB. The minimum size of TLB tag is (A) 12 bits (B) 15 bits (C) 16 bits (D) 20 bits

Answer 1

CPU is 32 bits.
Page size (Block Size) = 4 KB
TLB can hold 64 Blocks and it is 4 way associative. So  Set offset Size = 64/4 = 16 i.e. 4 bit 
Let tag is X bit long.

X + 4 + 12 = 32
X = 16 bit

Comments

Is this information sufficient to find individual TLB entry size?

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How 4KB page size maps to 12 lines.Shouldn't be 15 because CPU is in bits and page size is in Bytes.

Please help

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@sanpiy

page size:- 4kB  means physical (RAM)  memory is devided into blocks of size 4kB....and here system is byte addressable means evry byte of memory is holding a address...  

virtual address :-    32 bit  menas process size   is 2³² BYTE  .....