ISRO2008-37

Question

The ability to temporarily halt the CPU and use this time to send information on buses is called

• A. direct memory access
• B. vectoring the interrupt
• C. polling
• D. cycle stealing

Comments

CPU halts ? why cycle stealing ...CPU doesn't halt it just leave bus which is not required while it performs say some calculation.

https://cs.stackexchange.com/questions/69546/in-cycle-stealing-mode-does-cpu-gets-blocked-for-1-cycle-or-blocked-till-dma-tr

Answer 1

The ability to temporarily halt the CPU and use this time to send information buses is called Cycle Stealing .

Cycle Stealing mode is similar to Burst Transfer mode, but instead of the data being transferred all at once,it is transferred one byte at a time. The DMA controller, after transferring one byte of data, releases controlof the system buses by sending a bus grant signal through the control bus, lets the CPU process an instruction and then requests access to the bus by sending the bus request signal through the control bus and then transfers another byte of data. This keeps going on until all the data has been transferred. The transfer rate is slower but it prevents the CPU from staying idle for a long period of time.

Option D is correct.

Comments

OPTION A IS CORRECT....CYCLE STELING COMES UNDER DMA.

@MANOJK,@NAGA AM I WRONG

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see CYCLE STEALING COMES UNDER DMA.Qus is about that properties only.DMA is even more than that.follow the qus properly

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CYCLE STEALING SAYS-TEMPORARLY HALT AND TRANSFER 1 BYTE AT A TIME

DMA=TEMPORARLY HALT AND USE THE TIME TO SEND DATA

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Direct memory access  is a feature of computer systems that allows certain hardware subsystems to access main system memory independently of the central processing unit .

And the line you written is Burst mode of DMA.

And also the data block is not transferred as quickly in cycle stealing mode as in burst mode,  CPU is not idled for as long as in burst mode.

Answer 2

https://gateoverflow.in/49919/isro2008-37?show=51925

Answer 3

option D is the correct answer. reference: https://www.quora.com/Computer-Architecture-What-is-the-difference-between-the-burst-and-cycle-stealing-mechanism-in-DMA other references:: http://www.etechgeek.com/MockTest.aspx?id=82212&Subject=COMPUTER%20ARCHITECTURE http://www.avatto.com/computer-science/test/mcqs/computer/questions-answers/45/2.html

Answer 4

DMA has three modes;

Burst mode: Makes the CPU halt temporarily

Cycle stealing mode: Makes the CPU halt temporarily

Transparent mode: Doesn't make the CPU halt.

 

So we can't say DMA halts the CPU. Cycle stealing and burst mode do.

Hence, Option D