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Two control signals in microprocessor which are related to Direct Memory Access (DMA) are

  1. $\textsf{INTR & INTA}$
  2. $\textsf{RD & WR}$
  3. $\textsf{S0 & S1}$
  4. $\textsf{HOLD & HLDA}$
in CO and Architecture edited ago by
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Answer : D

The DMA Controller sends a Hold request line to the CPU and waits for the CPU to assert the HLDA

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Answer is D).

The HOLD signal as an input to the processor is used to request a DMA action.

The HLDA signal as an output that acknowledges the DMA action.

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D

interface logic sends the hold request to gain the control of system bus(data bus nd address bus)...when HLDA it means processor got into the blocked state or waiting state

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  • HOLD is used to request to DMA action
  • HOLDA is ack by the cpu .

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HOLD (Hold) is a control signal input and HLDA (Hold acknowledge) is a control signal output.
These two signals are used for hand shaked control during DMA operation (Direct Memory Access)
These two signals are used where there is more than one CPU like devices sharing the same system bus
Answer:

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