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Analyse the circuit in Fig below and complete the following table
$${\begin{array}{|c|c|c|}\hline
\textbf{a}&    \textbf{b}& \bf{ Q_n} \\\hline
0&0\\\ 0&1 \\     1&0 \\    1&1 \\ \hline  
 \end{array}}$$

asked in Digital Logic by Veteran (52.1k points)
edited by | 1.1k views
0
@Arjun Sir here question is incomplete
0
why?
0
where is c) question?
0
yes.. Actually that was moved to a new question- answer is yet to be moved. Each linked question was made separate so as to be included in exam when created.
+1

1 Answer

+14 votes
Best answer
The output of the circuit given as :

$Q=aQ_{n-1}+ab+bQ_{n-1}$

Hence,
$Q_{n}=Q_{n-1}(a+b)+ab$

$00 \implies  Q_{n-1}(0+0) + 0.0 = Q_{n-1}(0) + 0 = 0+0 = 0$

$01 \implies  Q_{n-1}(0+1) + 0.1= Q_{n-1} (1)+ 0 = Q_{n-1}+0 =  Q_{n-1}$

$10 \implies  Q_{n-1}(1+0) + 1.0 = Q_{n-1} (1) + 0 = Q_{n-1}+0= Q_{n-1}$

$11 \implies Q_{n-1}(1+1)+ 1.1 =Q_{n-1}(1) + 1 =Q_{n-1}+1 = 1$

$${\begin{array}{cc|c}
\textbf{a}&    \textbf{b}& \bf{ Q_n} \\\hline
0&0&0\\ 0&1& Q_{n-1} \\    1&0& Q_{n-1} \\   1&1 &1\\
\end{array}}$$
answered by Active (3.3k points)
edited by
+1
How the propagation delay is calculated..??

Here delay should be due to one OR gate and one AND gate.
0

@vaishali Part c is different. See this

https://gateoverflow.in/26442/gate1991_5-c

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11 =>  Qn-1(1+1) + 1.1 = Qn-1 (1) + 1 = Qn-1+1 = 1 hwo it is equals to 1

0
1+x=1 here x=Q n-1 .
0
your part c answer is wrong

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