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Using D flip-flop gates, design a parallel-in/serial-out shift register that shifts data from left to right with the following input lines:

  1. Clock $\text{CLK}$

  2. Three parallel data inputs $A, B, C$

  3. Serial input $S$

  4. Control input $\text{load} / \overline{\text{SHIFT}}$.

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2 Answers

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Refer the Logic diagram for the  parallel-in/serial-out SHIFT REGISTER, using D flip-flop gates that shifts data from left to right in this video : https://youtu.be/7LmBcGiiYwk
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–2 votes
ii. three parallel inputs A,B,C
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@Khamer can you please explane how?
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This question is not objective type. According to the question we just have to design the Shift register.

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