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In an $11-bit$ computer instruction format, the size of address field is $4-bits.$ The computer uses expanding OP code technique and has $5$ two-address instructions and $32$ one-address instructions. The number of zero-address instructions it can support is ________
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No. of possible instruction encoding $=2^{11} = 2048$

No. of encoding taken by two-address instructions $=5 \times 2^4 \times 2^4 = 1280$

No. of encoding taken by one-address instructions $=32 \times 2^4 = 512$

So, no. of possible zero-address instructions $=2048 - (1280 + 512) = 256$
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what is the logic behind the calculation of no. of 2 address and 3 address instructions ?

@arjun sir @habibkhan
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Could you generalize this concept for all  the problems because by using this method I am unable to find out the answer to all the questions .

Plz see this.

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Start at 07:32﻿

Out of 11 bits, 3 bits are for opcode in 2-Address. So 2^3=8 instructions(2-Address) are possible.

But 5 are being used. So 3 are free.

We use these 3 for 1-address instruction by using 4 bits of 1 of the addresses i.e. 3*16=48

Now out of 48 1-address instructions, 32 are being used. So we are left with 16.

Again use these 16 for 0-address instruction by using 4 bits of address i.e. 16*16=256