16 votes 16 votes Consider addition in two's complement arithmetic. A carry from the most significant bit does not always correspond to an overflow. Explain what is the condition for overflow in two's complement arithmetic. Digital Logic gate1992 digital-logic normal number-representation descriptive + – Kathleen asked Sep 13, 2014 • retagged Apr 19, 2021 by Lakshman Bhaiya Kathleen 2.6k views answer comment Share Follow See all 2 Comments See all 2 2 Comments reply Manu Thakur commented Dec 15, 2017 reply Follow Share $Remark:$ if the sign bit of both the signed numbers is not same as the sign bit of the product, then there is an overflow. 4 votes 4 votes raja11sep commented Dec 1, 2021 reply Follow Share Good read : #Number System - GATE Overflow 0 votes 0 votes Please log in or register to add a comment.
Best answer 19 votes 19 votes XOR of $C_{\text{in}}$ with $C_{\text{out}}$ of the MSB position. amarVashishth answered Dec 30, 2015 • edited Apr 19, 2021 by Lakshman Bhaiya amarVashishth comment Share Follow See all 2 Comments See all 2 2 Comments reply Rishav Kumar Singh commented Sep 21, 2018 reply Follow Share $C_{out} \bigoplus C_{in} = 1 (Overflow) $ $C_{out} \bigoplus C_{in} = 0 ( No Overflow)$ 14 votes 14 votes minimalist commented Dec 19, 2023 i edited by minimalist Feb 12 reply Follow Share Or can also sayLet A and B be two numbers a$_{(n)}$a$_{(n-1)}$a$_{(n-2)}$… a$_{1}$ a$_{0}$ + b$_{(n)}$b$_{(n-1)}$b$_{(n-2)}$...b$_{1}$ b$_{0}$result (R)= r$_{(n)}$r$_{(n-1)}$r$_{(n-2)}$...r$_{1}$r$_{0}$a$_{(n)}$ b$_{(n)}$ r’$_{(n)}$ + a’$_{(n)}$ b’$_{(n)}$r$_{(n)}$ =1 (overflow)a$_{(n)}$ b$_{(n)}$ r’$_{(n)}$ + a’$_{(n)}$ b’$_{(n)}$r$_{(n)}$ =0 (no overflow) 0 votes 0 votes Please log in or register to add a comment.
14 votes 14 votes (a) In 2's complement addition Overflow happens only when :Sign bit of two input numbers is 0, and the result has sign bit 1.Sign bit of two input numbers is 1, and the result has sign bit 0. Rajarshi Sarkar answered Apr 25, 2015 Rajarshi Sarkar comment Share Follow See all 2 Comments See all 2 2 Comments reply Manoja Rajalakshmi A commented Jul 25, 2018 i edited by Manoja Rajalakshmi A Jul 25, 2018 reply Follow Share In 4 bits representation, $-3$ 1101 (2's complement of $-3$) $+$ $-2$ 1110 (2's complement of $-2$) $-5$ 1011 (2's complement of $-5$) This is an example where there is carry from MSB but still there is no overflow. Is this right? 1 votes 1 votes srestha commented Aug 6, 2018 reply Follow Share yes more example here https://gateoverflow.in/231197/condition-for-overflow 0 votes 0 votes Please log in or register to add a comment.
0 votes 0 votes FOR overflow to happen during addition of two number in 2's complement form they must have same sign and result is of opposite sign (+A) + (+B)= -C (-A) + (-B)= +C avadh answered Jul 20, 2018 avadh comment Share Follow See all 0 reply Please log in or register to add a comment.