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If the question is given, L1 cache access time is 150ns/word and one block of L1 cache contains 5words.

Should I multiply the access time by 5 or leave it at 150ns as memory is word addressable?
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For The first cache near to CPU and CPU access word at a time so 150ns only..

But for if there is miss then depends on given specification... It is not that much simple to just multiply...we need to consider bus movement also...

Better to solve so many questions and read from standard book..

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