A CPU handles interrupt by executing an interrupt service subroutine (ISR) or interrupt handler whenever an interrupt is registered. When an interrupt occurs, the device or peripheral that generated the interrupt sends a signal to the CPU through an interrupt line. The CPU then checks the interrupt register to determine the source of the interrupt and transfers control to the appropriate ISR. The ISR performs the necessary operations to handle the interrupt, such as reading data from a device or updating system status, before returning control to the main program.
Option A and Option B are incorrect. The CPU does not check the interrupt register after the execution of each instruction or at the end of the fetch cycle. This would be inefficient and could result in a delay in handling interrupts. Instead, the CPU typically has a dedicated interrupt controller or hardware module that handles interrupts and signals the CPU when an interrupt occurs.
Option D is also incorrect. The CPU does not check the interrupt register at regular time intervals. Interrupts are handled on a priority basis, with higher priority interrupts being handled first.