GATE 1998 ECE

Question

	Two 2's complement number having sign bits X and Y are added and the sign bit of the result is Z. then, the occurrence of overflow is indicated by the Boolean function.
	A. XYZ B. X Y Z C. X YZ + XY Z D. XY + YZ + ZX

Comments

What i knew  Overflow can occur when two +ve number added result is -ve or when two -ve nmbers are added if result is +ve .
it could be also said in other way ie . Carry into MSB if same as Carry out of MSB then no overflow .
but this concept didn't help me choosing the answer . am I wrong somewhere ?

Answer 1

Here ..we can think like that when we adds two -ve sign numbers ans must be sign num and when adds two +be sign numbers ans must be +ve  only...

That is x=1 and y=1 same sign -ve  when adds result must be or z must be 1 only... But z is 0 than overflow..

x =0 and y=0 than z must be 0...

So xyz' + x'y'z is the right option...