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6 votes
6 votes

Please correct if any of the following does not represnt overflow condition when two binary 2s complement digits are added
 

  1. Two +ve (sign bit 0) numbers are added result is -ve ( sign bit becomes 1)
  2. Two -ve (sign bit 1) numbers are added result is +ve ( sign bit becomes 0)
  3. Carry from MSB  $\oplus$ Carry into MSB = 1
  4. When we add two unsigned numbers there is an out Carry C out

2 Answers

2 votes
2 votes

1) ${\color{Blue} 0} (C_{in}) 1001$=9

    ${\color{Blue} 0} (C_{in}) 1000$=8

$----------------------$

       ${\color{Blue} 1}0001$=17

Here Before addition sign bit=0

After addition sign bit=1

Carry (C_{in})=0

Overflow(C_{out})=1

2) ${\color{Blue} 1} (C_{in}) 1000$= -8

    ${\color{Blue} 1} (C_{in}) 1001$= -7

$----------------------$

       ${\color{Blue} 1}0001$= -15

Here Before addition sign bit=1

After addition sign bit=1

Carry (C_{in})=1

Overflow(C_{out})=1

3) same as 1

in eg. 1)$C_{in}\oplus C_{out}=1$

So, overflow occurs

  

4) Say, take two 4 bit number addition (like +14,+15)

After addition it takes more than 4 bits (out of range)

Then there is a overflow

edited by

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