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A system with a 2-level paging scheme in which a regular memory access takes 150 nanoseconds(ns) and page faults takes 4 miliseconds(ms). An average instruction takes 100 ns of cpu time and two memory accesses. The TLB hit ratio is 99% and the page fault rate is 1 in every 100,000 instructions. What is the effective average instruction execution time?

  1. 446 ns
  2. 1230 ns
  3. 830 ns
  4. 1050 ns
in Operating System
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2 Answers

5 votes
5 votes
Best answer
Answer is - A.

Effective Avg. Instruction execution time

= Avg. CPU time
+ Avg. Address Translation time
+ Avg. Memory Access time
+ Avg. Page Fault time

= 100 ns
+ 2 * 0.01 * (2* 150) ns (TLB access time neglected as not given in question)
+ 2 * 150 ns
+ 40 ns

= 446 ns.
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4 Comments

@Arjun  @jothee

Please review the below answer and let me know if it is correct or not 

EMAT = Adrress Translation + Memory Access

          = TLB Miss Time + no PF(mem access time) + PF(Page Fault time)

          = 0.01(2*150ns)+ (1-10^-5) (150 ns) + 10^-5(4*10^6 ns)

          = 3 + 149.99 + 40

          = 192.99

Effective instruction Time= CPU time + 2*EMAT

                                    =100 + 2* 192.99

                                    =485.98ns

        Since there are two memory acesses why cant be there 2 Page faults??

0
0

In question page fault rate is given per instruction and not per memory access.

1
1
Oh ok got it sir...thanx
0
0
0 votes
0 votes

In exams you can do it like this:-

The values in the options are far apart, you can safely approximate.

The TLB hit ratio is 99%

Let's say TLB hit ratio is 100%. (approx)

So, time taken to access the required words = $1[1ns+150ns]$ //1ns assumption for TLB access, you can also assume 0.

= $151 ns$. Or $150ns$ assuming 0ns for TLB

 

Given that:

An average instruction takes 100 ns of cpu time and two memory accesses.

So, $100ns+2*151ns=402ns$ Or $400ns$

Page Service Time = $40ns$

Total = $440ns$

So, Option A

This approach is mentally taken, and it hardly takes 20 seconds to get the answer.



Proper Solution:-

Memory Access Time via TLB = $0.99[150ns]+0.01[450ns]=153ns$

Given that:

An average instruction takes 100 ns of cpu time and two memory accesses.

So, $100ns + 2(153)ns=406ns$

Page Service Time required = $\frac{4*10^{-3}}{100,000} = 40ns$

 

So, Total = $406ns +40ns=446ns$

 

Option A


Really helpful playlist about Virtual Memory in general. https://www.youtube.com/playlist?list=PLAwxTw4SYaPn79fsplIuZG34KwbkYSedj

Answer:

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