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A processor that has carry, overflow and sign flag bits as part of it’s program status word , performs addition of two 2’s complement numbers 01001101 and 11101001. After the execution of this addition operation the status of the carry, overflow, zero and sign flags will be :

  1. 1, 1, 0, 0
  2. 1, 0, 1, 0
  3. 0, 1, 0, 0
  4. 1, 0, 0, 0

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      $01001101$

$+$  $\\11101001$

________________  

  $1\ 00110110$

  • carry flag: 1
  • Overflow flag=0
  • Zero flag=0 as the result is non-zero.
  • Sign flag=0 as MSB bit is $0$ represents a positive number.

Option $(D)$ is correct.

Answer:

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