Answer is (a)
Given clock is + edge triggered.
See the first positive edge. X is 0, and hence the output is 0. Q0 is 0 and Q0' is 1.
Second + edge, X is 1 and Q0' is also one. So, output is 1. (When second positive edge of the clock arrives, Q0' would surely be 1 because the setup time of flip-flop is given as 20 ns and the clock period is >= 40 ns)
Third + edge, X is 1 and Q0' is 0, So, output is 0. (Q0' becomes 0 before the 3rd positive edge, but output Y won't change as the flip-flop is positive edge triggered)
Now, output never changes back to 1 as Q0' is always 0 and when Q0' finally becomes 1, X is 0.
Set up time and hold times are given just to ensure that edge triggering works properly.